Design and implementation of a reconfigurable FIR filter in FPGA

Group members // Gianmarco Nagaro Quiroz, Daniele Ninni, Lorenzo Valentini, Emerson Rodriguez Vero Filho

This is our final project for Management and Analysis of Physics Dataset (Module A).

Abstract

FIR filters are among the most commonly used filters in signal processing. In this report the design and implementation of a FIR filter in FPGA is discussed. The performance of the implementation is evaluated by analyzing the response of the filter to various input sample signals generated in a Python environment. A USB serial interface, managed by a UART, carries the communication between computer and FPGA. The implementation in question allows updating the values of the FIR coefficients without having to rewrite the bitstream and, consequently, without having to reprogram the FPGA. The output of the FPGA is in agreement with the output of the Python implementation of the same filter, thus proving the goodness of the FPGA implementation. Furthermore, both outputs resemble the noiseless input signal, which proves that the filtering process respects all the characteristics established in the design phase.

File structure

.
├── constrs
│   └── mapping.xdc                             (constraints file)
|
├── img                                         (images)
│   ├── fir_coefficients.png
│   ├── frequency_response.png
│   ├── gaussian_pulse.png
│   ├── sinusoidal_wave.png
│   ├── sinusoidal_wave_with_unit_impulse.png
│   ├── square_wave.png
│   └── triangular_wave.png
|
├── sources                                     (implementation of the FIR filter)
|   ├── baudrate_generator.vhd
|   ├── fir_filter.vhd
|   ├── sampler_generator.vhd
|   ├── top.vhd
|   ├── uart_receiver.vhd
|   └── uart_transmitter.vhd
|
├── fir_filter_fpga.ipynb                       (demo notebook)
|
└── report.pdf                                  (report of this project)

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Management and Analysis of Physics Dataset (Module A)
University of Padua, A.Y. 2021/22