fud2 pipeline cleanup

fud2/scripts/profiler.rhai

@@ -9,7 +9,6 @@ export const flamegraph = state("flamegraph", ["svg"]);
 
 fn profiling_setup(e) {
     e.var_("cells", "cells.json");
-    e.var_("tdcc-json", "fsm.json"); // might not be necessary if we get rid of fsms?
 
     // series of passes after instrumentation?
     e.config_var_or("passes", "profiler.compilation-passes", "all"); // set passes="no-opt" to run without optimizations
@@ -40,7 +39,7 @@ fn calyx_to_flamegraph(e, input, output) {
     e.build_cmd(["$cells"], "component-cells", [input], []);
     e.build_cmd([instrumented_verilog], "calyx", [input], []);
     e.arg("backend", "verilog");
-    e.arg("args", "-p profiler -x tdcc:dump-fsm-json=fsm.json");
+    e.arg("args", "-p profiler");
 
     let instrumented_sim = "instrumented.exe";
     // verilog --> sim; adapted from verilator::verilator_build()

fud2/tests/snapshots/tests__test@plan_profiler.snap

@@ -20,7 +20,6 @@ rule calyx-cider
   command = $calyx-exe -l $calyx-lib-path $cider-calyx-passes $args $in > $out
 
 cells = cells.json
-tdcc-json = fsm.json
 passes = all
 component_cells = $calyx-base/target/debug/component_cells
 rule component-cells
@@ -54,7 +53,7 @@ cycle-limit = 500000000
 build $cells: component-cells /input.ext
 build instrumented.sv: calyx /input.ext
   backend = verilog
-  args = -p profiler -x tdcc:dump-fsm-json=fsm.json
+  args = -p profiler
 build verilator-out/Vtoplevel: verilator-compile-standalone-tb instrumented.sv | tb.sv
   out-dir = verilator-out
 build instrumented.exe: cp verilator-out/Vtoplevel