bsg-idea
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uw_openroad_free45
uw_openroad_free45 PublicUW reference flow for Free45PDK and The OpenROAD Project
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bsg_micro_designs
bsg_micro_designs PublicSections of BaseJump STL converted to Verilog, for testing with open source tools, such as OpenROAD.
Tcl 1
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caravel_user_project_ddr3_sstl
caravel_user_project_ddr3_sstl PublicForked from derekcom17/caravel_user_project_ddr3_sstl
DDR3 SSTL Test analog caravel user project
Verilog
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- bsg_micro_designs Public
Sections of BaseJump STL converted to Verilog, for testing with open source tools, such as OpenROAD.
bsg-idea/bsg_micro_designs’s past year of commit activity - caravel_user_project_ddr3_sstl Public Forked from derekcom17/caravel_user_project_ddr3_sstl
DDR3 SSTL Test analog caravel user project
bsg-idea/caravel_user_project_ddr3_sstl’s past year of commit activity - bsg_openroad_flow_tests Public
bsg-idea/bsg_openroad_flow_tests’s past year of commit activity
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