diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile
index 4ce1b0a7dfb11..ea6c6a0823e7a 100644
--- a/arch/arm64/boot/dts/rockchip/overlay/Makefile
+++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile
@@ -50,6 +50,7 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
 	radxa-cm5-io-sata.dtbo \
 	radxa-nx5-io-rpi-camera-v2-cam0.dtbo \
 	radxa-nx5-io-rpi-camera-v2-cam1.dtbo \
+	rk3588s-roc-pc-sata0.dtbo \
 	turing-rk1-sata2.dtbo \
 	mixtile-blade3-sata2.dtbo \
 	radxa-zero3-rpi-camera-v2.dtbo \
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3588s-roc-pc-sata0.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3588s-roc-pc-sata0.dts
new file mode 100644
index 0000000000000..e67d041af885d
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3588s-roc-pc-sata0.dts
@@ -0,0 +1,36 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+	fragment@0 {
+		target = <&sata0>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-names = "default";
+			pinctrl-0 = <&sata_reset>;
+		};
+	};
+  
+	fragment@1 {
+		target = <&pcie2x1l2>;
+
+		__overlay__ {
+			status = "disabled";
+		};
+	};
+
+	fragment@2 {
+		target = <&pinctrl>;
+
+		__overlay__ {
+			sata {
+		    		sata_reset:sata-reset{
+		   		rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+	    			};
+    			};
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts b/arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts
index 6937f2c510186..e79606f31c9b3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts
@@ -19,8 +19,6 @@
 #include "rk3588-rk806-single.dtsi"
 #include "rk3588-linux.dtsi"
 
-#define M2_SATA_OR_PCIE 1
-
 / {
 	model = "ROC-RK3588S-PC V12(Linux)";
 	compatible = "firefly,roc-rk3588s-pc", "firefly,station-m3", "rockchip,rk3588";
@@ -1008,19 +1006,11 @@
 	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART3>;
 };
 
-#if M2_SATA_OR_PCIE
-&sata0 {
-	status = "okay";
-    pinctrl-names = "default";
-    pinctrl-0 = <&sata_reset>;
-};
-#else
 &pcie2x1l2 {
 	status = "okay";
 	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
 	vpcie3v3-supply = <&vcc3v3_pcie20>;
 };
-#endif
 
 &pinctrl {
 	leds {
@@ -1062,13 +1052,6 @@
 			rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
-#if M2_SATA_OR_PCIE
-	sata {
-		sata_reset:sata-reset{
-			rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-#endif
 };
 
 // for fan when deep sleep