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Feature/esp pulse cnt #15079

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merged 6 commits into from
Dec 17, 2024
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eren-terzioglu
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@eren-terzioglu eren-terzioglu commented Dec 6, 2024

Summary

Pulse counter (PCNT) peripheral support added for ESP32, ESP32S2, ESP32S3, ESP32C6, ESP32H2 which is count the number of rising and/or falling edges of input signals. PCNT module can be used in scenarios like:

  • Calculate periodic signal's frequency by counting the pulse numbers within a time slice
  • Decode quadrature signals into speed and direction

Commits

  • esp32[c6|h2]: Add pulse counter support
  • esp32[s2|s3]: Add pulse counter support
  • esp32[s2|s3]: Add qencoder defconfig
  • esp32[h2]: Add qencoder defconfig

Impact

ESP32, ESP32S2, ESP32S3, ESP32C6, ESP32H2

Testing

esp32c6-devkitc:qencoder and other qencoder configs used to test qencoder devices with qe example. Also sample pcnt test used to test pcnt peripheral individually for every chip which supports PCNT(only esp32c3 does not have that peripheral support).

@github-actions github-actions bot added Area: Documentation Improvements or additions to documentation Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Arch: xtensa Issues related to the Xtensa architecture Area: OS Components OS Components issues Board: risc-v Board: xtensa Size: XL The size of the change in this PR is very large. Consider breaking down the PR into smaller pieces. labels Dec 6, 2024
@nuttxpr
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nuttxpr commented Dec 6, 2024

[Experimental Bot, please feedback here]

Fill In The Commit Message: This PR contains a Commit with an Empty Commit Message. Please fill in the Commit Message with the PR Summary.

Yes, this PR appears to meet the NuttX requirements, although some sections could be more detailed. Here's a breakdown:

Strengths:

  • Clear Summary: The summary explains the "why," "what," and "how" of the changes. The use cases provided are helpful.
  • Impact Section Started: The impact section identifies the affected architectures, which is a good start.
  • Testing Information Provided: Testing information is present, mentioning the specific configurations and examples used.

Weaknesses (and suggestions for improvement):

  • Missing Issue References: If this PR addresses any specific issues in the NuttX or NuttX Apps repositories, those should be linked in the Summary.
  • Incomplete Impact Assessment: The Impact section needs to be significantly expanded. Each of the sub-points (user impact, build impact, hardware impact, documentation, security, compatibility) should have a "YES" or "NO" answer followed by a description even if the answer is NO. For example: "Impact on build (will build process change)? NO (No changes to the build process are required)."
  • Insufficient Testing Detail: While testing configurations are mentioned, the provided logs are placeholder text. Actual log output demonstrating the functionality before and after the change is essential. Ideally, these logs should show both successful operation and any error handling. Be specific about the tests performed and the expected results. Quantify the results if possible (e.g., "Frequency measured within 0.1% accuracy").
  • Commit Messages Could Be Improved: While functional, the commit messages could be more descriptive. Instead of "Add pulse counter support," consider a message like "Implement PCNT driver for ESP32S2, adding support for pulse counting and quadrature decoding." This provides more context and makes the commit history easier to understand.

Example of a more complete Impact section:

  • Is new feature added? YES (Pulse counter peripheral support)
  • Impact on user (will user need to adapt to change)? YES (Users can now access the PCNT peripheral through the provided driver interface. New configuration options may be required in their applications and device trees.)
  • Impact on build (will build process change)? YES (New Kconfig options will be available to enable the PCNT driver. Users will need to select these options in their defconfigs to use the new functionality.)
  • Impact on hardware (will arch(s) / board(s) / driver(s) change)? YES (New drivers are added specifically for ESP32, ESP32S2, ESP32S3, ESP32C6, and ESP32H2. No changes to existing hardware are required, but new hardware using these features can now be supported.)
  • Impact on documentation (is update required / provided)? YES (Documentation updates are required to explain how to use the new PCNT driver, including configuration options and API usage. This documentation has been provided in [location of documentation]).
  • Impact on security (any sort of implications)? NO (No known security implications are introduced by this change.)
  • Impact on compatibility (backward/forward/interoperability)? NO (This change is backward compatible and does not impact interoperability with other features.)
  • Anything else to consider? None.

By addressing these weaknesses, the PR will be much stronger and easier for reviewers to evaluate.

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@acassis
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acassis commented Dec 7, 2024

@eren-terzioglu I suggest using Pulse Counter in the text because PCNT acronym is not used by all vendors (although at least Espressif and Silicon Labs use it)

@eren-terzioglu eren-terzioglu force-pushed the feature/esp_pulse_cnt branch 3 times, most recently from 0c7d934 to 3186920 Compare December 9, 2024 08:57
@raiden00pl
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raiden00pl commented Dec 9, 2024

I see that PCNT can count pulses and edges. capture.c can be used to count edges OR freq OR duty (capture low-level ops all are optional). Another option is to add optional CAPIOC_PULSES to capture.c instead of providing another driver with similar functionality.

The question is wheter CAPIOC_EDGES should be added to capture.c at all (9e388d1, #13126).
I agree with this PR that capture and pulse count are different functionalities. One measures events, the other measures time.
If we add a separate driver to count pulses, then CAPIOC_EDGES should be removed from capture.c.

@acassis
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acassis commented Dec 9, 2024

@raiden00pl I agree! Let's include this driver for now and open an issue to extend capture.c to support pulse counter as well.

@eren-terzioglu
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@xiaoxiang781216, Do you have different opinion?

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@github-actions github-actions bot added the Area: Drivers Drivers issues label Dec 11, 2024
@eren-terzioglu
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Thanks @raiden00pl, updated

@eren-terzioglu
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@xiaoxiang781216, I refactored the code with using capture driver. Fyi

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@eren-terzioglu
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Thanks @acassis, updated

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@eren-terzioglu eren-terzioglu force-pushed the feature/esp_pulse_cnt branch 3 times, most recently from 0d7f66e to 12343a1 Compare December 17, 2024 09:41
@acassis acassis merged commit c3d03f0 into apache:master Dec 17, 2024
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flags = spin_lock_irqsave(&priv->lock);

position = priv->position;
count = (int16_t)(pcnt_ll_get_count(priv->dev,
priv->config->pcntid) & 0xffff);
ret = (priv->pcnt->ops->ioctl(priv->pcnt,
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The change seems as total nonsense, please review and correct, @eren-terzioglu, @acassis, @Vajnar

The return value should not be clipped to 16-bits if you compare return to zero at the next line. The logic around counter seems to be totally broken as well. The value has been converted to int16_t in the Martin Vajnar to allow modulo arithmetic. I have open Issue #15319 for more communication and very probable breakages fixup.

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Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Arch: xtensa Issues related to the Xtensa architecture Area: Documentation Improvements or additions to documentation Area: Drivers Drivers issues Board: risc-v Board: xtensa Size: XL The size of the change in this PR is very large. Consider breaking down the PR into smaller pieces.
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7 participants