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Merge pull request #11 from abs-tudelft/chore/testing-isolation
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Testing isolation
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ccromjongh authored May 6, 2024
2 parents 8840e3f + 3430cb0 commit 8888efa
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Showing 42 changed files with 68 additions and 51 deletions.
2 changes: 1 addition & 1 deletion .gitignore
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Expand Up @@ -11,4 +11,4 @@ target/
test_run_dir/

build/
src/tydi/*/*.scala
library/src/tydi/*/*.scala
65 changes: 40 additions & 25 deletions build.sbt
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@@ -1,36 +1,51 @@
ThisBuild / homepage := Some(url("https://github.com/abs-tudelft/tydi-chisel"))
ThisBuild / organizationHomepage := Some(url("https://github.com/abs-tudelft/"))
ThisBuild / licenses := List(License.Apache2)
ThisBuild / version := "0.1.0"
ThisBuild / organization := "nl.tudelft"
ThisBuild / organizationName := "ABS Group, Delft University of Technology"
ThisBuild / startYear := Some(2023)

ThisBuild / scalaVersion := "2.13.12"

val chiselVersion = "5.1.0"

lazy val root = (project in file("."))
.settings(
name := "Tydi-Chisel",
description := "Tydi-Chisel is an implementation of Tydi concepts in the Chisel HDL.",
libraryDependencies += "org.chipsalliance" %% "chisel" % chiselVersion,
libraryDependencies += "edu.berkeley.cs" %% "chiseltest" % "5.0.2",
scalacOptions ++= Seq(
"-language:reflectiveCalls",
"-deprecation",
"-feature",
"-Xcheckinit",
"-Ymacro-annotations"
),
addCompilerPlugin("org.chipsalliance" % "chisel-plugin" % chiselVersion cross CrossVersion.full)
)
ThisBuild / scalaVersion := "2.13.12"

// Settings required for scalafix
ThisBuild / semanticdbEnabled := true
ThisBuild / semanticdbVersion := scalafixSemanticdb.revision
ThisBuild / scalafixScalaBinaryVersion := scalaBinaryVersion.value

lazy val commonSettings = Seq(
homepage := Some(url("https://github.com/abs-tudelft/tydi-chisel")),
organizationHomepage := Some(url("https://github.com/abs-tudelft/")),
licenses := List(License.Apache2),
version := "0.1.0",
organization := "nl.tudelft",
organizationName := "ABS Group, Delft University of Technology",
startYear := Some(2023),
libraryDependencies += "org.chipsalliance" %% "chisel" % chiselVersion,
scalacOptions ++= Seq("-language:reflectiveCalls", "-deprecation", "-feature", "-Xcheckinit", "-Ymacro-annotations"),
addCompilerPlugin("org.chipsalliance" % "chisel-plugin" % chiselVersion cross CrossVersion.full)
)

lazy val library: Project = (project in file("library"))
.settings(
commonSettings,
name := "Tydi-Chisel",
description := "Tydi-Chisel is an implementation of Tydi concepts in the Chisel HDL.",
libraryDependencies += "edu.berkeley.cs" %% "chiseltest" % "5.0.2" % Test
)
// .dependsOn(testingTools % "test->test")

lazy val testingTools: Project = (project in file("testing"))
.settings(
commonSettings,
name := "Tydi-Chisel-Test",
description := "This package contains the testing tools for Tydi-Chisel",
libraryDependencies += "edu.berkeley.cs" %% "chiseltest" % "5.0.2"
)
.dependsOn(library % "compile->compile") // Make testingTools project depend on the library project

// Aggregate projects to build them together
lazy val root = (project in file("."))
.aggregate(library, testingTools)
.settings(
publish := {}, // Disable publishing for the root project
publishLocal := {}
)

val CICommands =
Seq("clean", "compile", "test", "scalafmtCheckAll", "scalafmtSbtCheck", "scalafixAll --check").mkString(";")

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Expand Up @@ -3,7 +3,6 @@ package nl.tudelft.tydi_chisel.examples.pipeline
import chisel3._
import chisel3.internal.firrtl.Width
import chisel3.util.Counter
import chiseltest.RawTester.test
import circt.stage.ChiselStage.{emitCHIRRTL, emitSystemVerilog}
import nl.tudelft.tydi_chisel._

Expand Down Expand Up @@ -117,8 +116,6 @@ class PipelineExampleModule extends SimpleProcessorBase(new NumberGroup, new Sta
object PipelineExample extends App {
println("Test123")

test(new PipelineExampleModule()) { c => println(c.tydiCode) }

// println(emitCHIRRTL(new NonNegativeFilter()))
// println(emitSystemVerilog(new NonNegativeFilter(), firtoolOpts = firNormalOpts))

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Expand Up @@ -4,7 +4,6 @@ import chisel3._
import chisel3.experimental.hierarchy.Definition
import chisel3.internal.firrtl.Width
import chisel3.util.Counter
import chiseltest.RawTester.test
import circt.stage.ChiselStage.{emitCHIRRTL, emitSystemVerilog}
import nl.tudelft.tydi_chisel._

Expand Down Expand Up @@ -114,10 +113,6 @@ class PipelinePlusStart
object PipelineExamplePlus extends App {
println("Test123")

// test(new PipelinePlusModule()) { c =>
// println(c.tydiCode)
// }

// println(emitCHIRRTL(new MultiNonNegativeFilter()))
// println(emitSystemVerilog(new NonNegativeFilter(), firtoolOpts = firNormalOpts))

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Expand Up @@ -25,12 +25,6 @@ class SubProcessor extends SubProcessorBase(new RgbBundle, new RgbBundle) {
class MainProcessor extends MultiProcessorGeneral(Definition(new SubProcessor), 6, new RgbBundle, new RgbBundle)

object RgbMultiProcessing extends App {
import chiseltest.RawTester.test

test(new MainProcessor()) { c =>
val str = c.tydiCode
println(str)
}
println(emitCHIRRTL(new MainProcessor()))

private val noOptimizationVerilog: String =
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Expand Up @@ -2,7 +2,6 @@ package nl.tudelft.tydi_chisel.examples.timestamped_message

import chisel3._
import chisel3.internal.firrtl.Width
import chiseltest.RawTester.test
import circt.stage.ChiselStage.{emitCHIRRTL, emitSystemVerilog}
import nl.tudelft.tydi_chisel._

Expand Down Expand Up @@ -97,8 +96,6 @@ object TimestampedMessage extends App {
Array("-disable-opt", "-O=debug", "-disable-all-randomization", "-strip-debug-info" /*, "-preserve-values=all"*/ )
println("Test123")

test(new TopLevelModule()) { c => println(c.tydiCode) }

println((new NestedBundle).createEnum)

println(emitCHIRRTL(new TimestampedMessageModuleOut()))
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@@ -1,4 +1,4 @@
package nl.tudelft.tydi_chisel
package nl.tudelft.tydi_chisel_test

import scala.language.implicitConversions

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@@ -0,0 +1,19 @@
package nl.tudelft.tydi_chisel

import chiseltest._
import nl.tudelft.tydi_chisel.examples.pipeline.{PipelineExampleModule, PipelinePlusModule}
import nl.tudelft.tydi_chisel.examples.rgb.MainProcessor
import nl.tudelft.tydi_chisel.examples.timestamped_message.TopLevelModule
import org.scalatest.flatspec.AnyFlatSpec

class ReverseTranspileTest extends AnyFlatSpec with ChiselScalatestTester {
behavior of "reverse transpilation"

it should "reverse transpile" in {
// Test reverse transpilation of Chisel to Tydi-Lang code for various modules.
test(new PipelineExampleModule()) { c => println(c.tydiCode) }
test(new PipelinePlusModule()) { c => println(c.tydiCode) }
test(new MainProcessor()) { c => println(c.tydiCode) }
test(new TopLevelModule()) { c => println(c.tydiCode) }
}
}
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Expand Up @@ -3,7 +3,7 @@ package nl.tudelft.tydi_chisel
import chisel3._
import chisel3.experimental.BundleLiterals.AddBundleLiteralConstructor
import chiseltest._
import nl.tudelft.tydi_chisel.Conversions._
import nl.tudelft.tydi_chisel_test.Conversions._
import org.scalatest.flatspec.AnyFlatSpec

class TydiStreamDriverTest extends AnyFlatSpec with ChiselScalatestTester {
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Expand Up @@ -4,8 +4,8 @@ import chisel3._
import chisel3.experimental.BundleLiterals.AddBundleLiteralConstructor
import chisel3.experimental.VecLiterals.{AddObjectLiteralConstructor, AddVecLiteralConstructor}
import chiseltest._
import nl.tudelft.tydi_chisel.Conversions._
import nl.tudelft.tydi_chisel.{TydiProcessorTestWrapper, TydiTestWrapper}
import nl.tudelft.tydi_chisel_test.Conversions._
import org.scalatest.flatspec.AnyFlatSpec

class PipelineExamplePlusTest extends AnyFlatSpec with ChiselScalatestTester {
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Expand Up @@ -2,8 +2,8 @@ package nl.tudelft.tydi_chisel.examples.pipeline

import chisel3._
import chiseltest._
import nl.tudelft.tydi_chisel.Conversions._
import nl.tudelft.tydi_chisel.{TydiProcessorTestWrapper, TydiTestWrapper}
import nl.tudelft.tydi_chisel_test.Conversions._
import org.scalatest.flatspec.AnyFlatSpec

class PipelineExampleTest extends AnyFlatSpec with ChiselScalatestTester {
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Expand Up @@ -5,9 +5,9 @@ import chisel3.experimental.BundleLiterals.AddBundleLiteralConstructor
import chisel3.experimental.VecLiterals.{AddObjectLiteralConstructor, AddVecLiteralConstructor}
import chiseltest._
import chiseltest.experimental.expose
import nl.tudelft.tydi_chisel.Conversions._
import nl.tudelft.tydi_chisel._
import nl.tudelft.tydi_chisel.printUtils._
import nl.tudelft.tydi_chisel_test.Conversions._
import nl.tudelft.tydi_chisel_test.printUtils._
import org.scalatest.flatspec.AnyFlatSpec

class ComplexityConverterTest extends AnyFlatSpec with ChiselScalatestTester {
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Expand Up @@ -3,7 +3,7 @@ package nl.tudelft.tydi_chisel.utils
import chisel3._
import chisel3.experimental.VecLiterals.AddObjectLiteralConstructor
import chiseltest._
import nl.tudelft.tydi_chisel.printUtils.binaryFromUint
import nl.tudelft.tydi_chisel_test.printUtils.binaryFromUint
import org.scalatest.flatspec.AnyFlatSpec

class LastSeqLengthTest extends AnyFlatSpec with ChiselScalatestTester {
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Expand Up @@ -3,7 +3,7 @@ package nl.tudelft.tydi_chisel.utils
import chisel3._
import chisel3.experimental.VecLiterals.AddObjectLiteralConstructor
import chiseltest._
import nl.tudelft.tydi_chisel.printUtils._
import nl.tudelft.tydi_chisel_test.printUtils._
import org.scalatest.flatspec.AnyFlatSpec

class LastSeqProcessorTest extends AnyFlatSpec with ChiselScalatestTester {
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