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AI Engine Examples

Vitis Model Composer allows you to create AI Engine designs and generate code for them. The visualization and analysis capabilities of MATLAB and Simulink presents an excellent environment to debug any design and make sure the design functionally performs as expected.

Importing Kernels and Graphs into Model Composer
Importing a kernel class as a block In this example we import an AI Engine class kernel into Vitis Model Composer as a block.
Importing a graph as a block In this example we import an AI Engine graph into Vitis Model Composer as a block.
Importing an AIE-ML graph as a block In this example we import a graph for AIE-ML devices (including memory tiles) into Vitis Model Composer as a block.

Run time parameters (RTP)
A design with a scalar RTP input This example showcases a design that includes an AI Engine kernel with a scalar input RTP.
A design with a vector RTP input This example showcases a design that includes an AI Engine kernel with a synchronous vector input RTP.
A design with a vector asynchronous RTP input This example showcases a design that includes an AI Engine kernel with a asynchronous vector input RTP.

DSP Functions
Using the AI Engine FFT block from the library browser This example showcases a design that uses an AI Engine FFT block from the library browser.
Using the AI Engine FIR block from the library browser This example showcases a design that uses an AI Engine FIR block from the library browser.
Using the AI Engine FFT Stream block from the library browser This example showcases a design that uses an AI Engine Stream FFT block with SSR of 2 from the library browser.
Importing Matrix Multiply from DSPLib as a block This example showcases how you can import a DSPLib function as a block.
Using the AI Engine Dynamic Point FFT This example showcases the use of the AI Engine Dynamic Point FFT block.
Using DSPLib AI Engine SSR FIR Using DSPLib AI Engine SSR FIR block to achieve 4 Gsps throughput.

Other examples
Super Sample Rate FIR filter This design showcases a Super Sample Rate FIR filter to process a 4GSPS input stream. In this design we also compare the output of our AI Engine subsystem with the output of a Simulink FIR block (our golden reference) both in time and in frequency.
Dual Stream Super Sample Rate FIR filter This design showcases a Dual Stream Super Sample Rate FIR filter to process a 16GSPS input stream. In this design we also compare the output of the AI Engine subsystem with the output of a Simulink FIR block (the golden reference).
Pseudo Inverse 64x32 This design showcases an AI Engine implementation of a 64x32 Pseudo Inverse in Vitis Model Composer. The AI Engine output is compared with the output of the pseudo inverse block in Simulink which is used as a reference.
Filtering in frequency domain This design showcases filtering in frequency domain and also shows how to increase the throughput using different techniques.
Farrow Filter This example demonstrates a Vitis Model Composer testbench for a fractional delay Farrow filter.

More AI Engine and Programmable Logic Examples

For more examples with AI Engine and Programmable Logic click here.