diff --git a/doc/_extensions/.gitempty b/doc/_extensions/.gitempty new file mode 100644 index 000000000..e69de29bb diff --git a/doc/requirements.txt b/doc/requirements.txt index da63251ac..210a45816 100644 --- a/doc/requirements.txt +++ b/doc/requirements.txt @@ -1,6 +1,6 @@ -r ../requirements.txt # Enforce latest version on ReadTheDocs -sphinx>=4.1.2 +sphinx>=4.2.0 # Sphinx Extenstions #sphinx.ext.coverage diff --git a/pyVHDLModel/__init__.py b/pyVHDLModel/__init__.py index 3c9b80cf6..d62310e54 100644 --- a/pyVHDLModel/__init__.py +++ b/pyVHDLModel/__init__.py @@ -41,7 +41,7 @@ :license: Apache License, Version 2.0 """ from enum import IntEnum, unique, Enum -from typing import List, Iterable, Union, Optional as Nullable +from typing import List, Iterable, Union, Optional as Nullable, Dict from pydecor import export @@ -86,6 +86,90 @@ 'ContextReference' ] + +@export +@unique +class VHDLVersion(Enum): + """ + An enumeration for all possible version numbers for VHDL. + + A version can be given as integer or string and is represented as a unified + enumeration value. + + This enumeration supports compare operators. + """ + + VHDL87 = 87 + VHDL93 = 93 + VHDL2002 = 2002 + VHDL2008 = 2008 + VHDL2019 = 2019 + + __VERSION_MAPPINGS__: Dict[Union[int, str], Enum] = { + 87: VHDL87, + 93: VHDL93, + 2: VHDL2002, + 8: VHDL2008, + 19: VHDL2019, + 1987: VHDL87, + 1993: VHDL93, + 2002: VHDL2002, + 2008: VHDL2008, + 2019: VHDL2019, + "87": VHDL87, + "93": VHDL93, + "02": VHDL2002, + "08": VHDL2008, + "19": VHDL2019, + "1987": VHDL87, + "1993": VHDL93, + "2002": VHDL2002, + "2008": VHDL2008, + "2019": VHDL2019 + } + + def __init__(self, *_) -> None: + """Patch the embedded MAP dictionary""" + for k, v in self.__class__.__VERSION_MAPPINGS__.items(): + if ((not isinstance(v, self.__class__)) and (v == self.value)): + self.__class__.__VERSION_MAPPINGS__[k] = self + + @classmethod + def Parse(cls, value: Union[int, str]) -> 'Enum': + try: + return cls.__VERSION_MAPPINGS__[value] + except KeyError: + ValueError("Value '{0!s}' cannot be parsed to member of {1}.".format(value, cls.__name__)) + + def __lt__(self, other: Enum) -> bool: + return self.value < other.value + + def __le__(self, other: Enum) -> bool: + return self.value <= other.value + + def __gt__(self, other: Enum) -> bool: + return self.value > other.value + + def __ge__(self, other: Enum) -> bool: + return self.value >= other.value + + def __ne__(self, other: Enum) -> bool: + return self.value != other.value + + def __eq__(self, other: Enum) -> bool: + if ((self is self.__class__.Any) or (other is self.__class__.Any)): + return True + else: + return (self.value == other.value) + + + def __str__(self) -> str: + return "VHDL'" + str(self.value)[-2:] + + def __repr__(self) -> str: + return str(self.value) + + @export @unique class Direction(Enum): diff --git a/tests/unit/Instantiate.py b/tests/unit/Instantiate.py index a021ca1d1..60bf68abd 100644 --- a/tests/unit/Instantiate.py +++ b/tests/unit/Instantiate.py @@ -10,10 +10,6 @@ # # Python unittest: Instantiation tests for the language model. # -# Description: -# ------------------------------------ -# TODO: -# # License: # ============================================================================== # Copyright 2017-2021 Patrick Lehmann - Boetzingen, Germany