libcpu: riscv: fixed ARCH_RISCV_VECTOR issue

description: Using the vector instruction set to trigger
an illegal instruction exception when ARCH_SISCV_VECTOR=y.

analysis: When initializing the thread stack,
the rt_cw_stack_init function did not enable VS for SSTATUS.

Solution: When ARCH_SISCV_VECTOR=y,
increment the initial value of sstatus by 0x600(SSTATUS_VS).

Signed-off-by: Liu Gui <kenneth.liu@sophgo.com>

libcpu/risc-v/common64/cpuport.c

@@ -19,9 +19,15 @@
 #include <encoding.h>
 
 #ifdef ARCH_RISCV_FPU
-    #define K_SSTATUS_DEFAULT (SSTATUS_SPP | SSTATUS_SPIE | SSTATUS_SUM | SSTATUS_FS)
+    #define K_SSTATUS_DEFAULT_BASE (SSTATUS_SPP | SSTATUS_SPIE | SSTATUS_SUM | SSTATUS_FS)
 #else
-    #define K_SSTATUS_DEFAULT (SSTATUS_SPP | SSTATUS_SPIE | SSTATUS_SUM)
+    #define K_SSTATUS_DEFAULT_BASE (SSTATUS_SPP | SSTATUS_SPIE | SSTATUS_SUM)
+#endif
+
+#ifdef ARCH_RISCV_VECTOR
+    #define K_SSTATUS_DEFAULT (K_SSTATUS_DEFAULT_BASE | SSTATUS_VS)
+#else
+    #define K_SSTATUS_DEFAULT K_SSTATUS_DEFAULT_BASE
 #endif
 #ifdef RT_USING_SMART
 #include <lwp_arch.h>