fx_cm4_loadable.sct

#! armclang -x assembler-with-cpp -E --target=arm-arm-none-eabi
; The first line specifies a preprocessor command that the linker invokes
; to pass a scatter file through a C preprocessor.

;*******************************************************************************
;* \file fx_cm4_loadable.sct
;* \version 1.00
;*
;* Linker file for the ARMCC.
;*
;* The main purpose of the linker script is to describe how the sections in the
;* input files should be mapped into the output file, and to control the memory
;* layout of the output file.
;*
;* \note The entry point location is fixed and starts at 0x10000000. The valid
;* application image should be placed there.
;*
;* \note The linker files included with the PDL template projects must be
;* generic and handle all common use cases. Your project may not use every
;* section defined in the linker files. In that case you may see the warnings
;* during the build process: L6314W (no section matches pattern) and/or L6329W
;* (pattern only matches removed unused sections). In your project, you can
;* suppress the warning by passing the "--diag_suppress=L6314W,L6329W" option to
;* the linker, simply comment out or remove the relevant code in the linker
;* file.
;*
;*******************************************************************************
;* \copyright
;* Copyright 2021-2022 Cypress Semiconductor Corporation
;* SPDX-License-Identifier: Apache-2.0
;*
;* Licensed under the Apache License, Version 2.0 (the "License");
;* you may not use this file except in compliance with the License.
;* You may obtain a copy of the License at
;*
;*     http://www.apache.org/licenses/LICENSE-2.0
;*
;* Unless required by applicable law or agreed to in writing, software
;* distributed under the License is distributed on an "AS IS" BASIS,
;* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
;* See the License for the specific language governing permissions and
;* limitations under the License.
;******************************************************************************/

; The defines below describe the location and size of blocks of memory in the target.
; Use these defines to specify the memory regions available for allocation.

; The following defines control RAM and flash memory allocation for the CM4 core.
; You can change the memory allocation by editing RAM and Flash defines.
; The first 32 KB (0x8000) bytes of FLASH are used by the bootloader.
; Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use.
; Using this memory region for other purposes will lead to unexpected behavior.
; Your changes must be aligned with the corresponding defines for CM0+ core in 'xx_cm0plus.scat',
; where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.scat'.
; RAM
#define RAM_START               0x08002000
#define RAM_SIZE                0x0001D800
; Flash
#define FLASH_START             0x10008000
#define FLASH_SIZE              0x00077E00
#define SIGNATURE_START         0x1007FE00
#define SIGNATURE_SIZE          0x00000200
;HB-SRAM
#define DESC_START              0x1C004000
#define DESC_SIZE               0x0000C000

; The size of the stack section at the end of CM4 SRAM
#define STACK_SIZE              0x00002000

; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
; More about CM0+ prebuilt images, see here:
; https://github.com/Infineon/psoc6cm0p
; The size of the Cortex-M0+ application flash image
#define FLASH_CM0P_SIZE         0x0400

; Cortex-M4 application flash area
LR_IROM1 FLASH_START FLASH_SIZE
{
    ; Cortex-M0+ application flash image area
    .cy_m0p_image +0 FLASH_CM0P_SIZE
    {
        * (.cm0_code)
    }

    ER_FLASH_VECTORS (FLASH_START + FLASH_CM0P_SIZE) FIXED
    {
        * (RESET, +FIRST)
    }

    ER_FLASH_CODE +0 FIXED
    {
        *.o(.text)
        *.o(+RO)
    }

    ER_RAM_VECTORS RAM_START UNINIT
    {
        * (RESET_RAM, +FIRST)
    }

    RW_RAM_DATA +0
    {
        * (.cy_ramfunc)
        * (+RW, +ZI)
    }

    ; Place variables in the section that should not be initialized during the
    ; device startup.
    RW_IRAM1 +0 UNINIT
    {
        * (.noinit)
    }

    ; Application heap area (HEAP)
    ARM_LIB_HEAP  +0 EMPTY ((RAM_START+RAM_SIZE)-AlignExpr(ImageLimit(RW_IRAM1), 8)-STACK_SIZE)
    {
    }

    ; Stack region growing down
    ARM_LIB_STACK (RAM_START+RAM_SIZE) EMPTY -STACK_SIZE
    {
    }

    ; Place USB3 descriptors in this section.
    RW_USB3_DESC DESC_START
    {
        * (.descSection)
        * (.hbBufSection)
    }
}

; Application SHA signature area
LR_IROM2 SIGNATURE_START SIGNATURE_SIZE
{
    ; Used for the SHA checksum of the loadable application. Size reserved is 512 bytes
    .cy_app_signature SIGNATURE_START SIGNATURE_SIZE
    {
        * (.cy_app_signature)
    }
}

/* The following symbols used by the cymcuelftool. */
/* Flash */
#define __cy_memory_0_start     0x10008000
#define __cy_memory_0_length    0x00078000
#define __cy_memory_0_row_size  0x200

/* Symbols provided to cymcuelftool for checksum generation. */
#define __cy_app_verify_start   0x10008000
#define __cy_app_verify_length  0x77E00
#define __cy_app_signature_addr 0x1007FE00

/* Supervisory Flash */
#define __cy_memory_2_start     0x16000000
#define __cy_memory_2_length    0x8000
#define __cy_memory_2_row_size  0x200

/* XIP */
#define __cy_memory_3_start     0x18000000
#define __cy_memory_3_length    0x08000000
#define __cy_memory_3_row_size  0x200

/* eFuse */
#define __cy_memory_4_start     0x90700000
#define __cy_memory_4_length    0x100000
#define __cy_memory_4_row_size  1

/* [] END OF FILE */