4-bit asynchronous multiplier, implemented in VHDL
This is an asynchronous 4-bit multipler designed for the Virtex6 VLX240T 1156 series of chips, though the logic should probably work with others. It takes two signed 4-bit numbers, multiplies them, and has an 8 bit signed output.
Import like with other VHDL objects.
Mostly just a project for my FPGA class, where we implement a multipler with threshold gates.