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Implementation of the Arithmetic Logic unit of the SAP1 computer, a minimalist educational computer architecture, for the CO221 course project at Department of Computer Engineering - University of Peradeniya.

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SAP-1 Computer ALU Design Project

Welcome to the SAP1 (Simple As Possible 1) Computer ALU Design Project repository! This project was developed as part of the CO221 (Degital Design) course at Department of Computer Engineering - University of Peradeniya. The SAP1 computer is a minimalist computer architecture designed to introduce students to the fundamentals of digital logic and computer organization.

Project Description

This repository contains all the necessary files, documentation, and code for building and simulating the SAP1 computer - ALU Module.

Contributors

  • Janakantha S.M.B.G.
  • Haththella H.A.D.T.N.
  • Hewawasam A.K.L.

Supervisor

  • Dr. Kamalanath Samarakoon

Funding

This project is funded by ACES (Asociation of Computer Engineering Students), supporting innovation and education in computer engineering at University of Peradeniya.

Course Information

  • Course: CO221 - Digital Design
  • Course Coordinator: Dr. Kamalanath Samarakoon

Resources

  • Detailed documentation
  • Simulator for testing and debugging
  • PCB Designs

Feedback and Contributions

We welcome feedback and contributions from the community. If you have suggestions, improvements, or bug fixes, please submit a pull request or open an issue on GitHub.

License

See the LICENSE file for details.

Special Thanks

  • Dr. Kamalanath Samarakoon (Supervisor)
  • Prof. Roshan Ragel (Head of the Department)
  • ACES (Asociation of Computer Engineering Students)(Funding)

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Implementation of the Arithmetic Logic unit of the SAP1 computer, a minimalist educational computer architecture, for the CO221 course project at Department of Computer Engineering - University of Peradeniya.

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