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Fix usage of rom- and rambank selected to avoid modulo at every access
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Co-authored-by: thatguy <>
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Baekalfen committed Oct 23, 2023
1 parent da70f1b commit d0bdfea
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Showing 5 changed files with 14 additions and 14 deletions.
4 changes: 2 additions & 2 deletions pyboy/core/cartridge/base_mbc.py
Original file line number Diff line number Diff line change
Expand Up @@ -123,7 +123,7 @@ def getitem(self, address):
if 0x0000 <= address < 0x4000:
return self.rombanks[0][address]
elif 0x4000 <= address < 0x8000:
return self.rombanks[self.rombank_selected % self.external_rom_count][address - 0x4000]
return self.rombanks[self.rombank_selected][address - 0x4000]
elif 0xA000 <= address < 0xC000:
if not self.rambank_initialized:
logger.error("RAM banks not initialized: %s" % hex(address))
Expand All @@ -134,7 +134,7 @@ def getitem(self, address):
if self.rtc_enabled and 0x08 <= self.rambank_selected <= 0x0C:
return self.rtc.getregister(self.rambank_selected)
else:
return self.rambanks[self.rambank_selected % self.external_ram_count][address - 0xA000]
return self.rambanks[self.rambank_selected][address - 0xA000]
else:
logger.error("Reading address invalid: %s" % address)

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8 changes: 4 additions & 4 deletions pyboy/core/cartridge/mbc1.py
Original file line number Diff line number Diff line change
Expand Up @@ -54,8 +54,8 @@ def getitem(self, address):
return self.rombanks[self.rombank_selected][address]
elif 0x4000 <= address < 0x8000:
self.rombank_selected = \
(self.bank_select_register2 << 5) % self.external_rom_count | self.bank_select_register1
return self.rombanks[self.rombank_selected % len(self.rombanks)][address - 0x4000]
((self.bank_select_register2 << 5) | self.bank_select_register1) % self.external_rom_count
return self.rombanks[self.rombank_selected][address - 0x4000]
elif 0xA000 <= address < 0xC000:
if not self.rambank_initialized:
logger.error("RAM banks not initialized: %s" % hex(address))
Expand All @@ -64,10 +64,10 @@ def getitem(self, address):
return 0xFF

if self.memorymodel == 1:
self.rambank_selected = self.bank_select_register2
self.rambank_selected = self.bank_select_register2 % self.external_ram_count
else:
self.rambank_selected = 0
return self.rambanks[self.rambank_selected % self.external_ram_count][address - 0xA000]
return self.rambanks[self.rambank_selected][address - 0xA000]
else:
logger.error("Reading address invalid: %s" % address)

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4 changes: 2 additions & 2 deletions pyboy/core/cartridge/mbc2.py
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@ def setitem(self, address, value):
else:
if value == 0:
value = 1
self.rombank_selected = value
self.rombank_selected = value % self.external_rom_count
elif 0xA000 <= address < 0xC000:
if self.rambanks is None:
logger.warning(
Expand All @@ -38,7 +38,7 @@ def getitem(self, address):
if 0x0000 <= address < 0x4000:
return self.rombanks[0][address]
elif 0x4000 <= address < 0x8000:
return self.rombanks[self.rombank_selected % len(self.rombanks)][address - 0x4000]
return self.rombanks[self.rombank_selected][address - 0x4000]
elif 0xA000 <= address < 0xC000:
if not self.rambank_initialized:
logger.error("RAM banks not initialized: %s" % hex(address))
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4 changes: 2 additions & 2 deletions pyboy/core/cartridge/mbc3.py
Original file line number Diff line number Diff line change
Expand Up @@ -27,9 +27,9 @@ def setitem(self, address, value):
value &= 0b01111111
if value == 0:
value = 1
self.rombank_selected = value
self.rombank_selected = value % self.external_rom_count
elif 0x4000 <= address < 0x6000:
self.rambank_selected = value
self.rambank_selected = value % self.external_ram_count
elif 0x6000 <= address < 0x8000:
if self.rtc_enabled:
self.rtc.writecommand(value)
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8 changes: 4 additions & 4 deletions pyboy/core/cartridge/mbc5.py
Original file line number Diff line number Diff line change
Expand Up @@ -17,12 +17,12 @@ def setitem(self, address, value):
self.rambank_enabled = (value == 0b00001010)
elif 0x2000 <= address < 0x3000:
# 8-bit register used for the lower 8 bits of the ROM bank number.
self.rombank_selected = (self.rombank_selected & 0b100000000) | value
self.rombank_selected = ((self.rombank_selected & 0b100000000) | value) % self.external_rom_count
elif 0x3000 <= address < 0x4000:
# 1-bit register used for the most significant bit of the ROM bank number.
self.rombank_selected = ((value & 0x1) << 8) | (self.rombank_selected & 0xFF)
self.rombank_selected = (((value & 0x1) << 8) | (self.rombank_selected & 0xFF)) % self.external_rom_count
elif 0x4000 <= address < 0x6000:
self.rambank_selected = value & 0xF
self.rambank_selected = (value & 0xF) % self.external_ram_count
elif 0xA000 <= address < 0xC000:
if self.rambanks is None:
logger.warning(
Expand All @@ -32,6 +32,6 @@ def setitem(self, address, value):
)
self.init_rambanks(self.external_ram_count)
if self.rambank_enabled:
self.rambanks[self.rambank_selected % self.external_ram_count][address - 0xA000] = value
self.rambanks[self.rambank_selected][address - 0xA000] = value
else:
logger.debug("Unexpected write to 0x%0.4x, value: 0x%0.2x" % (address, value))

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