-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathtegra234-p3768-overlay.dts
70 lines (66 loc) · 1.62 KB
/
tegra234-p3768-overlay.dts
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
/*
* SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: GPL-2.0-only
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/dts-v1/;
/plugin/;
/ {
overlay-name = "P3768 Overlay Support";
compatible = "nvidia,tegra23x";
nvidia,dtsfilename = __FILE__;
nvidia,dtbbuildtime = __DATE__, __TIME__;
/*
* If ODMDATA contains hsio-uphy-config-40, then:
* 1. Disable PCIE C4
* 2. Enable PCIE C4 EP
* 3. Reduce PCIE C1 to Gen2
*/
fragment@0 {
target-path = "/";
board_config {
odm-data = "hsio-uphy-config-40";
};
__overlay__ {
pcie@14160000 {
status = "disabled";
};
pcie_ep@14160000 {
status = "okay";
};
pcie@14100000 {
max-link-speed = <2>;
};
};
};
/*
* If ODMDATA contains hsio-uphy-config-41, then:
* 1. Disable PCIE C4
* 2. Enable PCIE C4 EP
*/
fragment@1 {
target-path = "/";
board_config {
odm-data = "hsio-uphy-config-41";
};
__overlay__ {
pcie@14160000 {
status = "disabled";
};
pcie_ep@14160000 {
status = "okay";
};
};
};
};