VHDL-ALU

A Structural model of a simple ALU using VHDL

Name		Name	Last commit message	Last commit date
Latest commit History 2 Commits
ALU.vhd		ALU.vhd
ALU_tb.vhd		ALU_tb.vhd
Adder4.vhd		Adder4.vhd
Adder4_tb.vhd		Adder4_tb.vhd
ArithmeticUnit.vhd		ArithmeticUnit.vhd
FullAdder.vhd		FullAdder.vhd
FullAdder_tb.vhd		FullAdder_tb.vhd
HalfAdder.vhd		HalfAdder.vhd
HalfAdder_tb.vhd		HalfAdder_tb.vhd
LogicUnit.vhd		LogicUnit.vhd
NoCarryFullAdder.vhd		NoCarryFullAdder.vhd
README.md		README.md

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